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RE: [Discuss-gnuradio] Default FPGA I/O standard


From: Nirali Patel
Subject: RE: [Discuss-gnuradio] Default FPGA I/O standard
Date: Mon, 1 Oct 2007 17:54:36 -0500

Hi Matt,

I modified the usrp_std.v file to make connections to the debug IO pins and
then on my PC tried to compile the project using Quartus II software. The
compile went successfully, but later when I opened the Pin-Out file under
Compilation Report all the signals showed at 3.3V-LVTTL. I had only clicked
on the play button after opening the .qpf project. 
I would like to know if the default settings are still all 3.3V LVCMOS and I
inadvertently changed something. If not, I would like to set the 16-bit
debug pins to LVCMOS since I am trying to attach a CMOS cable to the pins on
basic RX. Could you recommend a way to do this? Do I have to look at IO
banking rules etc.? I have some FPGA background but not a whole lot.

Thanks,
Nirali Patel

-----Original Message-----
From: Matt Ettus [mailto:address@hidden 
Sent: Wednesday, September 26, 2007 5:01 PM
To: Nirali Patel
Cc: address@hidden
Subject: Re: [Discuss-gnuradio] Default FPGA I/O standard

Nirali Patel wrote:
> Hi all,
>
> I am trying to find out the default I/O standard e.g LVTTL, LVCMOS that is
set on the FPGA general purpose debug pins (16-bits available on the
daughter card connectors). I don't have Quartus II installed yet. Is there a
way to find out or set this through Python?
>   

3.3V LVCMOS






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