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Re: [Discuss-gnuradio] Why 4 ADC's?


From: Jeff Brower
Subject: Re: [Discuss-gnuradio] Why 4 ADC's?
Date: Thu, 19 Jul 2007 11:31:10 -0500

Eric-

> > > The LFRX has two separate antenna inputs, supplied to Vin-A and
> > > Vin-B.  These are not I-Q data.  USRP board FPGA logic would apply
> > > one mixer or two (30 MHz or less).
> >
> > [...]
> >
> > > The RFX2400 mixes with a 2.4 GHz osc and creates one set of I-Q 65
> > > MHz range signals, +/-I on Vin-A and +/-Q on Vin-B.  To get baseband
> > > signals, the logic has to apply two mixers.
> >
> > The FPGA DDC logic uses a single but *complex* mixer to do frequency
> > conversion of the signal from the ADCs.  That is, it treats the data
> > from Vin-A and Vin-B as a complex number in I and Q format, and
> > multiplies this complex number by a complex sinusoid of a configurable
> > frequency.  This is very different from having two mixers.
> 
> In fact the routing from the ADCs to the inputs of the DDCs is
> controlled by the input mux in the FPGA.  You can route any ADC
> into any DDC input, or you can stick a constant zero into the Q input
> (details below).
> 
> The _default_ wiring depends on the software that controls the given
> daughterboard.  By default the Basic Rx and LF RX daughterboard code
> treats the two inputs as two separate real inputs (not I & Q), one
> into DDC 0, one into DDC 1.  You can easily override this by calling
> u.set_mux(...)  The RFX-* daughterboards treat the signals as I & Q,
> since that's the only configuration that makes sense given the
> quadrature output of the RFX-* boards.

Thanks, that's very helpful.  I thought there would have to be a way to form
real-valued data for the low-end daughtercards, but hadn't found it yet.

-Jeff

> See http://gnuradio.org/trac/wiki/UsrpRfxDiagrams
> 
>   /*!
>    * \brief Set input mux configuration.
>    *
>    * This determines which ADC (or constant zero) is connected to
>    * each DDC input.  There are 4 DDCs.  Each has two inputs.
>    *
>    * <pre>
>    * Mux value:
>    *
>    *    3                   2                   1
>    *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
>    * +-------+-------+-------+-------+-------+-------+-------+-------+
>    * |   Q3  |   I3  |   Q2  |   I2  |   Q1  |   I1  |   Q0  |   I0  |
>    * +-------+-------+-------+-------+-------+-------+-------+-------+
>    *
>    * Each 4-bit I field is either 0,1,2,3
>    * Each 4-bit Q field is either 0,1,2,3 or 0xf (input is const zero)
>    * All Q's must be 0xf or none of them may be 0xf
>    * </pre>
>    */
>   bool set_mux  (int mux);
> 
> Eric [ decloaking after vacation ;) ]




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