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Re: [Discuss-gnuradio] few more queries on FPGA
From: |
Matt Ettus |
Subject: |
Re: [Discuss-gnuradio] few more queries on FPGA |
Date: |
Thu, 16 Mar 2006 16:30:03 -0800 |
User-agent: |
Thunderbird 1.5 (X11/20051201) |
amit malani wrote:
> Hello!
>
> the memory allocated for each of the fifo in tx_buffer and rx_buffer is
> twice their capacity.....i.e 65K 'bits'(8192 bytes)..as seen from the
> compilation report of Quartus.....any specific reason?
Not sure what you mean. The FIFOs are 4K lines long, with each line 16
bits.
> also, when i have two Rx..Then how exactly is the rx_buffer used to
> store and keep seperated the data comming from 2 RX paths?
The different paths alternate in the FIFO. The data is in this order
CH1-I
CH1-Q
CH2-I
CH2-Q
etc.
> Things which could be controlled from Python on FPGA and AD/DA
> converters are:
> Gains.
> Decimation Rate.
> Can bits/sample of AD/DA converters be controlled from Python?
> What else is controllable from Python?
The ADCs always sample at 12 bits. The DACs are always 14. The data
processed in the USRP is always 16 bits. From python you can switch to
8-bit samples over the USB. This allows you to double your sample rate.
Matt
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