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Re: [Discuss-gnuradio] Reducing the ADC sample rate


From: address@hidden
Subject: Re: [Discuss-gnuradio] Reducing the ADC sample rate
Date: Mon, 14 Nov 2005 18:17:16 -0500

On Fri, 11 Nov 2005 11:42:18 -0800, Eric responded:

>>On Fri, Nov 11, 2005 at 12:09:13PM -0500, address@hidden wrote:
>> I would like to reduce the ADC sample rate from the default 62.5 MS/s.  I
>> have found the set_adc_clk_div in the usrp0_rx class.  Is this still
>> usable.  I tried to use it in the follow:

>No.  That was only implemented in the Rev 0 USRP.

Ah, the usrp0 code if for older hardware, not just older version of the
code.

>>FYI, the ADC sample rate on the current boards is 64MS/sec.

I stand corrected.  I got the 62.5 MS/s from the usrp0 code.

>> I did 'from gnuradio import usrp0' and still get the error.  I also tried
>> 
>> u = usrp0.source_c()
>> 

>You don't have a usrp0, so this is moot.

I just saw that in the schematic that the AD9862 gets its clock dirrectly
from the VCTCXO.  

Is there any other way to decrease the sample rate beside the decim_rate?

Mike

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