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[Commit-gnuradio] r10447 - in usrp-hw/trunk/sym: generated xilinx
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From: |
matt |
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Subject: |
[Commit-gnuradio] r10447 - in usrp-hw/trunk/sym: generated xilinx |
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Date: |
Mon, 16 Feb 2009 12:09:32 -0700 (MST) |
Author: matt
Date: 2009-02-16 12:09:32 -0700 (Mon, 16 Feb 2009)
New Revision: 10447
Modified:
usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO0.src
usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO1.src
usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO2.src
usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO3.src
usrp-hw/trunk/sym/xilinx/xilinxgen676
Log:
make input only pins "in" in symbols to help with DRC
Modified: usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO0.src
===================================================================
--- usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO0.src 2009-02-16 14:41:47 UTC
(rev 10446)
+++ usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO0.src 2009-02-16 19:09:32 UTC
(rev 10447)
@@ -67,14 +67,14 @@
C22 io line l IO_L05N_0
C23 io line l IO_L06N_0
D6 io line l IO_L44N_0
-D7 io line r IP_0/VREF_0
+D7 in line r IP_0/VREF_0
D8 io line l IO_L40N_0
D9 io line l IO_L37N_0
D10 io line l IO_L34N_0
D11 io line r IO_L32N_0/VREF_0
D12 in line r IP_0
D13 io line l IO_L30P_0
-D14 io line r IP_0/VREF_0
+D14 in line r IP_0/VREF_0
D16 io line l IO_L22P_0
D17 io line l IO_L21P_0
D18 io line l IO_L17P_0
@@ -104,7 +104,7 @@
F20 io line l IO_L01N_0
G9 io line l IO_L47P_0
G10 io line l IO_L46P_0
-G11 io line r IP_0/VREF_0
+G11 in line r IP_0/VREF_0
G12 io line l IO_L35P_0
G14 in line r IP_0
G15 io line l IO_L16P_0
@@ -126,7 +126,7 @@
J13 in line r IP_0
J15 in line r IP_0
J16 io line l IO_L12P_0
-J17 io line r IP_0/VREF_0
+J17 in line r IP_0/VREF_0
K11 io line l IO_L43N_0
K12 io line l IO_L39N_0
K16 io line l IO_L12N_0
Modified: usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO1.src
===================================================================
--- usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO1.src 2009-02-16 14:41:47 UTC
(rev 10446)
+++ usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO1.src 2009-02-16 19:09:32 UTC
(rev 10447)
@@ -33,7 +33,7 @@
AD25 io line l IO_L02N_1/LDC0
AD26 io line l IO_L05P_1
AE26 io line l IO_L02P_1/LDC1
-B26 io line r IP_1/VREF_1
+B26 in line r IP_1/VREF_1
C25 io line l IO_L63N_1/A23
C26 io line l IO_L63P_1/A22
D24 io line l IO_L61N_1
@@ -50,13 +50,13 @@
G22 io line l IO_L58N_1
G23 io line l IO_L51P_1
G24 io line l IO_L51N_1
-G25 io line r IP_1/VREF_1
+G25 in line r IP_1/VREF_1
H20 io line l IO_L64P_1/A24
H21 io line l IO_L62N_1/A21
H22 pwr line b VCCO_1
H24 in line r IP_1
H25 pwr line b VCCO_1
-H26 io line r IP_1/VREF_1
+H26 in line r IP_1/VREF_1
J19 io line l IO_L59P_1
J20 io line l IO_L59N_1
J21 io line l IO_L62P_1/A20
@@ -87,7 +87,7 @@
M21 io line l IO_L45P_1
M22 io line l IO_L45N_1
M23 io line l IO_L38N_1/A13
-M24 io line r IP_L36P_1/VREF_1
+M24 in line r IP_L36P_1/VREF_1
M25 io line l IO_L35N_1/A11
M26 io line l IO_L35P_1/A10
N17 io line l IO_L39N_1/A15
@@ -105,7 +105,7 @@
R20 io line l IO_L22N_1
R21 io line l IO_L25P_1/A2
R22 io line l IO_L25N_1/A3
-R23 io line r IP_L28P_1/VREF_1
+R23 in line r IP_L28P_1/VREF_1
R24 in line r IP_L28N_1
R25 io line l IO_L29P_1/A8
R26 io line l IO_L29N_1/A9
@@ -123,7 +123,7 @@
U22 io line l IO_L21N_1
U23 io line l IO_L23P_1
U24 io line r IO_L23N_1/VREF_1
-U26 io line r IP_1/VREF_1
+U26 in line r IP_1/VREF_1
V18 io line l IO_L08P_1
V19 io line l IO_L08N_1
V21 io line l IO_L10P_1
@@ -131,7 +131,7 @@
V23 io line l IO_L21P_1
V24 io line l IO_L19P_1
V25 io line l IO_L19N_1
-V26 io line r IP_1/VREF_1
+V26 in line r IP_1/VREF_1
W20 io line l IO_L04P_1
W21 io line l IO_L04N_1
W22 pwr line b VCCO_1
Modified: usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO2.src
===================================================================
--- usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO2.src 2009-02-16 14:41:47 UTC
(rev 10446)
+++ usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO2.src 2009-02-16 19:09:32 UTC
(rev 10447)
@@ -18,12 +18,12 @@
author=xilinxgen.py
numslots=0
[pins]
-AA9 io line r IP_2/VREF_2
+AA9 in line r IP_2/VREF_2
AA10 io line l IO_L12N_2
AA17 io line l IO_L43P_2
AA18 io line l IO_L47N_2
-AA20 io line r IP_2/VREF_2
-AB6 io line r IP_2/VREF_2
+AA20 in line r IP_2/VREF_2
+AB6 in line r IP_2/VREF_2
AB7 io line l IO_L14N_2
AB8 pwr line b VCCO_2
AB9 io line l IO_L15P_2
@@ -36,7 +36,7 @@
AC6 io line l IO_L08P_2
AC8 io line l IO_L14P_2
AC9 io line l IO_L15N_2
-AC10 io line r IP_2/VREF_2
+AC10 in line r IP_2/VREF_2
AC11 io line l IO_L23N_2
AC12 io line l IO_L21N_2
AC13 in line r IP_2
@@ -53,7 +53,7 @@
AD9 in line r IP_2
AD10 in line r IP_2
AD11 io line l IO_L23P_2
-AD12 io line r IP_2/VREF_2
+AD12 in line r IP_2/VREF_2
AD14 io line l IO_L29P_2
AD16 in line r IP_2
AD17 io line l IO_L33N_2
@@ -81,11 +81,11 @@
AF5 io line l IO_L10P_2
AF7 pwr line b VCCO_2
AF8 io line l IO_L18N_2
-AF15 io line r IP_2/VREF_2
-AF17 io line r IP_2/VREF_2
+AF15 in line r IP_2/VREF_2
+AF17 in line r IP_2/VREF_2
AF19 io line l IO_L37P_2
AF20 io line l IO_L39P_2
-AF22 io line r IP_2/VREF_2
+AF22 in line r IP_2/VREF_2
AF23 io line l IO_L48P_2
AF25 io line l IO_L51P_2
U11 io line l IO_L13N_2
@@ -109,5 +109,5 @@
W17 io line l IO_L46P_2
Y9 io line l IO_L05N_2
Y10 io line l IO_L12P_2
-Y16 io line r IP_2/VREF_2
+Y16 in line r IP_2/VREF_2
Y17 io line l IO_L43N_2
Modified: usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO3.src
===================================================================
--- usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO3.src 2009-02-16 14:41:47 UTC
(rev 10446)
+++ usrp-hw/trunk/sym/generated/xc3sd3400afg676-IO3.src 2009-02-16 19:09:32 UTC
(rev 10447)
@@ -20,7 +20,7 @@
[pins]
AA2 io line l IO_L55P_3
AA3 io line l IO_L55N_3
-AA5 io line r IP_3/VREF_3
+AA5 in line r IP_3/VREF_3
AB1 io line l IO_L60P_3
AB2 pwr line b VCCO_3
AC1 io line l IO_L60N_3
@@ -29,10 +29,10 @@
AD1 io line l IO_L65P_3
AD2 io line l IO_L65N_3
AE1 in line r IP_L66P_3
-AE2 io line r IP_L66N_3/VREF_3
+AE2 in line r IP_L66N_3/VREF_3
B1 io line l IO_L02N_3
B2 io line l IO_L02P_3
-C1 io line r IP_3/VREF_3
+C1 in line r IP_3/VREF_3
C2 pwr line b VCCO_3
D3 io line l IO_L06P_3
E1 io line l IO_L11P_3
@@ -49,12 +49,12 @@
G6 io line l IO_L03P_3
H1 io line l IO_L17N_3
H2 io line l IO_L17P_3
-H4 io line r IP_3/VREF_3
+H4 in line r IP_3/VREF_3
H5 pwr line b VCCO_3
H6 io line l IO_L10N_3
H7 io line l IO_L03N_3
J1 in line r IP_L24P_3
-J2 io line r IP_L20N_3/VREF_3
+J2 in line r IP_L20N_3/VREF_3
J3 in line r IP_L20P_3
J4 io line l IO_L19N_3
J5 io line l IO_L19P_3
@@ -132,7 +132,7 @@
V7 io line l IO_L59P_3
V8 io line l IO_L61N_3
W1 in line r IP_L50P_3
-W2 io line r IP_L50N_3/VREF_3
+W2 in line r IP_L50N_3/VREF_3
W3 io line l IO_L52P_3
W4 io line l IO_L52N_3
W5 pwr line b VCCO_3
Modified: usrp-hw/trunk/sym/xilinx/xilinxgen676
===================================================================
--- usrp-hw/trunk/sym/xilinx/xilinxgen676 2009-02-16 14:41:47 UTC (rev
10446)
+++ usrp-hw/trunk/sym/xilinx/xilinxgen676 2009-02-16 19:09:32 UTC (rev
10447)
@@ -2,6 +2,8 @@
import re
matchstr = re.compile("_")
+is_input = re.compile("IP")
+is_io = re.compile("IO")
def writepin(file,number,name,linetype,pintype,pos):
#newname = matchstr.sub("\\_",name)
@@ -112,7 +114,12 @@
writepin(rhclockfile,elements[0],elements[1],'clk','clk','l')
elif(pintype == 'VREF'):
-
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','r')
+ if(re.match(is_input,elements[1])):
+
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','in','r')
+ elif(re.match(is_io,elements[1])):
+
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','r')
+ else:
+ print "VREF pintype error", elements[1]
elif(pintype == 'I/O'):
writepin(iofiles[int(elements[2])],elements[0],elements[1],'line','io','l')
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