[Commit-gnuradio] r10311 - in gnuradio/branches/releases/3.2/usrp2/fpga: opencores/aemb/rtl/verilog opencores/aemb/rtl/verilog/CVS serdes

[jcorgan]

Author: jcorgan
Date: 2009-01-27 08:43:04 -0700 (Tue, 27 Jan 2009)
New Revision: 10311

Modified:
   
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/CVS/Entries
   
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_ibuf.v
   
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_sim.v
   gnuradio/branches/releases/3.2/usrp2/fpga/serdes/serdes_rx.v
Log:
Merged r10284, r10288:10290 from trunk into release-3.2 branch

Modified: 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/CVS/Entries
===================================================================
--- 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/CVS/Entries
    2009-01-27 15:36:54 UTC (rev 10310)
+++ 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/CVS/Entries
    2009-01-27 15:43:04 UTC (rev 10311)
@@ -1,11 +1,3 @@
-/aeMB_bpcu.v/1.4/Mon Feb  4 17:16:00 2008//
-/aeMB_core.v/1.9/Mon Feb  4 17:16:00 2008//
-/aeMB_ctrl.v/1.10/Mon Feb  4 17:16:00 2008//
-/aeMB_edk32.v/1.14/Mon Feb  4 17:16:00 2008//
-/aeMB_ibuf.v/1.10/Tue May 20 17:45:01 2008//
-/aeMB_regf.v/1.3/Mon Feb  4 17:16:00 2008//
-/aeMB_sim.v/1.1/Mon Feb  4 17:16:00 2008//
-/aeMB_xecu.v/1.12/Tue May 20 17:48:57 2008//
 /aeMB2_aslu.v/1.10/Tue May 20 18:13:50 2008//
 /aeMB2_bpcu.v/1.5/Tue May 20 18:13:50 2008//
 /aeMB2_brcc.v/1.3/Tue May 20 18:13:50 2008//
@@ -35,4 +27,12 @@
 /aeMB2_sysc.v/1.5/Tue May 20 18:13:51 2008//
 /aeMB2_tpsram.v/1.3/Tue May 20 18:13:51 2008//
 /aeMB2_xslif.v/1.7/Tue May 20 18:13:52 2008//
+/aeMB_bpcu.v/1.4/Thu Sep 11 02:11:12 2008//
+/aeMB_core.v/1.9/Thu Sep 11 02:11:12 2008//
+/aeMB_ctrl.v/1.10/Thu Sep 11 02:11:12 2008//
+/aeMB_edk32.v/1.14/Thu Sep 11 02:11:12 2008//
+/aeMB_ibuf.v/1.10/Thu Sep 11 02:11:12 2008//
+/aeMB_regf.v/1.3/Thu Sep 11 02:11:12 2008//
+/aeMB_sim.v/1.2/Thu Jan 22 05:50:30 2009//
+/aeMB_xecu.v/1.12/Thu Sep 11 02:11:12 2008//
 D

Modified: 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_ibuf.v
===================================================================
--- 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_ibuf.v
    2009-01-27 15:36:54 UTC (rev 10310)
+++ 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_ibuf.v
    2009-01-27 15:43:04 UTC (rev 10311)
@@ -149,7 +149,7 @@
        rSTALL <= 1'h0;
        // End of automatics
      end else begin
-       rSTALL <= #1 (!rSTALL & (fMUL | fBSF)) | (oena & rSTALL);       
+       rSTALL <= #1 (gena & !rSTALL & (fMUL | fBSF)) | (oena & rSTALL);        
      end
    
 endmodule // aeMB_ibuf
@@ -189,4 +189,4 @@
  New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
  Fixed various minor data hazard bugs.
  Code compatible with -O0/1/2/3/s generated code.
-*/
\ No newline at end of file
+*/

Modified: 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_sim.v
===================================================================
--- 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_sim.v 
    2009-01-27 15:36:54 UTC (rev 10310)
+++ 
gnuradio/branches/releases/3.2/usrp2/fpga/opencores/aemb/rtl/verilog/aeMB_sim.v 
    2009-01-27 15:43:04 UTC (rev 10311)
@@ -1,4 +1,4 @@
-/* $Id: aeMB_sim.v,v 1.1 2007/12/23 20:40:45 sybreon Exp $
+/* $Id: aeMB_sim.v,v 1.2 2008/06/06 09:36:02 sybreon Exp $
 **
 ** AEMB EDK 3.2 Compatible Core
 ** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <address@hidden>
@@ -104,7 +104,9 @@
    wire [DW-1:0]       dwb_adr = {dwb_adr_o,2'd0};   
    wire [1:0]          wBRA = {cpu.rBRA, cpu.rDLY};   
    wire [3:0]          wMSR = {cpu.xecu.rMSR_BIP, cpu.xecu.rMSR_C, 
cpu.xecu.rMSR_IE, cpu.xecu.rMSR_BE};
-   
+
+
+   `ifdef AEMB_SIM_KERNEL
    always @(posedge cpu.gclk) begin
       if (cpu.gena) begin
         
@@ -293,6 +295,7 @@
       end // if (cpu.gena)
       
    end // always @ (posedge cpu.gclk)
+   `endif //  `ifdef AEMB_SIM_KERNEL
    
    // synopsys translate_on
    
@@ -300,6 +303,9 @@
 
 /* 
  $Log: aeMB_sim.v,v $
+ Revision 1.2  2008/06/06 09:36:02  sybreon
+ single thread design
+
  Revision 1.1  2007/12/23 20:40:45  sybreon
  Abstracted simulation kernel (aeMB_sim) to split simulation models from 
synthesis models.
  

Modified: gnuradio/branches/releases/3.2/usrp2/fpga/serdes/serdes_rx.v
===================================================================
--- gnuradio/branches/releases/3.2/usrp2/fpga/serdes/serdes_rx.v        
2009-01-27 15:36:54 UTC (rev 10310)
+++ gnuradio/branches/releases/3.2/usrp2/fpga/serdes/serdes_rx.v        
2009-01-27 15:43:04 UTC (rev 10311)
@@ -337,7 +337,8 @@
 
    assign      wr_dat_o = line_o;
 
-   wire        slu = ~({2'b11,K_ERROR,K_ERROR}=={ser_rkmsb,ser_rklsb,ser_r});
+   wire        slu = ~(({2'b11,K_ERROR,K_ERROR}=={ser_rkmsb,ser_rklsb,ser_r}) 
||
+                      ({2'b11,K_LOS,K_LOS}=={ser_rkmsb,ser_rklsb,ser_r}));
    reg [3:0]   slu_reg;
    
    always @(posedge clk)