[Commit-gnuradio] r8006 - usrp2/trunk/fpga/control_lib

[matt]

Author: matt
Date: 2008-03-12 14:21:12 -0600 (Wed, 12 Mar 2008)
New Revision: 8006

Added:
   usrp2/trunk/fpga/control_lib/fifo_2clock_casc.v
Log:
new experiment


Added: usrp2/trunk/fpga/control_lib/fifo_2clock_casc.v
===================================================================
--- usrp2/trunk/fpga/control_lib/fifo_2clock_casc.v                             
(rev 0)
+++ usrp2/trunk/fpga/control_lib/fifo_2clock_casc.v     2008-03-12 20:21:12 UTC 
(rev 8006)
@@ -0,0 +1,28 @@
+
+module fifo_2clock_casc
+  #(parameter DWIDTH=32, AWIDTH=9)
+    (input wclk, input [DWIDTH-1:0] datain, input write, output full, output 
reg [AWIDTH-1:0] level_wclk,
+     input rclk, output [DWIDTH-1:0] dataout, input read, output empty, output 
reg [AWIDTH-1:0] level_rclk,
+     input arst);
+
+   shortfifo #(.WIDTH(DWIDTH)) shortfifo
+     (.clk(wclk), .rst(arst), .clear(0),
+      .datain(datain), .write(write), .full(full),
+      .dataout(data_int), .read(transfer), .empty(empty_int) );
+
+   assign  transfer = ~full_int & ~empty_int;
+   
+   fifo_2clock #(.DWIDTH(DWIDTH),.AWIDTH(AWIDTH))
+     (.wclk(wclk), .datain(data_int), .write(transfer), .full(full_int), 
.level_wclk(level_wclk),
+      .rclk(rclk), .dataout(data_int2), .read(transfer2), .empty(empty_int2), 
.level_rclk(level_rclk),
+      .arst(arst) );
+
+   assign  transfer2 = ~full_int2 & ~empty_int2;
+
+   shortfifo #(.WIDTH(DWIDTH))
+     (.clk(rclk), .rst(arst), .clear(0),
+      .datain(data_int2), .write(transfer2), .full(full_int2),
+      .dataout(dataout), .read(read), .empty(empty) );
+   
+endmodule // fifo_2clock_casc
+