[Commit-gnuradio] r7992 - usrp2/trunk/firmware/apps

[matt]

Author: matt
Date: 2008-03-11 18:34:10 -0600 (Tue, 11 Mar 2008)
New Revision: 7992

Added:
   usrp2/trunk/firmware/apps/sd_bounce.c
Modified:
   usrp2/trunk/firmware/apps/Makefile.am
Log:
the other end of the serdes loopback tester.  work in progress


Modified: usrp2/trunk/firmware/apps/Makefile.am
===================================================================
--- usrp2/trunk/firmware/apps/Makefile.am       2008-03-11 22:19:55 UTC (rev 
7991)
+++ usrp2/trunk/firmware/apps/Makefile.am       2008-03-12 00:34:10 UTC (rev 
7992)
@@ -42,7 +42,8 @@
        tx_standalone \
        eth_to_serdes \
        serdes_to_dsp \
-       sd_gentest
+       sd_gentest \
+       sd_bounce
 
 
 # tx_drop_SOURCES = tx_drop.c app_common.c

Added: usrp2/trunk/firmware/apps/sd_bounce.c
===================================================================
--- usrp2/trunk/firmware/apps/sd_bounce.c                               (rev 0)
+++ usrp2/trunk/firmware/apps/sd_bounce.c       2008-03-12 00:34:10 UTC (rev 
7992)
@@ -0,0 +1,201 @@
+/*
+ * Copyright 2007,2008 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+#include "u2_init.h"
+#include "memory_map.h"
+#include "spi.h"
+#include "hal_io.h"
+#include "buffer_pool.h"
+#include "pic.h"
+#include "bool.h"
+#include "nonstdio.h"
+#include "memset_wa.h"
+#include <stddef.h>
+#include <stdlib.h>
+#include <string.h>
+
+// ----------------------------------------------------------------
+
+int packet_number = 0;
+volatile bool send_packet_now = 0;
+
+#define SERDES_TX_BUF  0
+#define        SERDES_RX_BUF   1
+
+
+#define NLINES_PER_PKT 380
+
+
+// ----------------------------------------------------------------
+
+static int timer_delta = (int)(MASTER_CLK_RATE * 100e-6);
+
+void
+timer_irq_handler(unsigned irq)
+{
+  hal_set_timeout(timer_delta);        // schedule next timeout
+  send_packet_now = true;
+}
+
+
+static void
+init_packet(int *buf)
+{
+  int i = 0;
+  for (i = 0; i < BP_NLINES; i++){
+    buf[i] = ((2*i + 0) << 16) | (2*i+1);
+  }
+}
+
+static bool
+check_packet(int *buf, int nlines)
+{
+  bool ok = true;
+  int i = 0;
+  for (i = 0; i < nlines; i++){
+    int expected = ((2*i + 0) << 16) | (2*i+1);
+    if (buf[i] != expected){
+      ok = false;
+      printf("buf[%d] = 0x%x  expected = 0x%x\n", i, buf[i], expected);
+    }
+  }
+  return ok;
+}
+
+static void
+zero_buffer(int bufno)
+{
+  memset_wa(buffer_ram(bufno), 0, BP_NLINES * 4);
+}
+
+static void
+init_packets(void)
+{
+  // init just the one we're using
+  init_packet(buffer_ram(SERDES_TX_BUF));
+}
+
+int
+main(void)
+{
+  u2_init();
+
+  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
+  hal_gpio_set_tx_mode(15, 0, GPIOM_FPGA_0);
+  hal_gpio_set_rx_mode(15, 0, GPIOM_FPGA_0);
+
+  putstr("\nsd_gentest\n");
+  
+  // Set up serdes
+  //output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN | SERDES_LOOPEN);
+  output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN);
+
+  init_packets();
+
+  // pic_register_handler(IRQ_TIMER, timer_irq_handler);
+
+  //if (hwconfig_simulation_p())
+  //  timer_delta = sim_timer_delta;
+
+  // start a receive from sd
+  zero_buffer(SERDES_RX_BUF);
+  bp_receive_to_buf(SERDES_RX_BUF, PORT_SERDES, 1, 0, BP_LAST_LINE);
+
+  // fire off the first packet
+  bp_send_from_buf(SERDES_TX_BUF, PORT_SERDES, 1, 0, NLINES_PER_PKT);
+  hal_set_timeout(timer_delta);
+
+
+  int counter = 0;
+
+#define EXPECTING_PKT() ((counter & 0x1) == 0)
+#define        SEND_PKT()      ((counter & 0x1) != 0)
+
+  bool got_packet = false;
+
+  while(1){
+    uint32_t status = buffer_pool_status->status;
+
+    if (status & (BPS_DONE(SERDES_RX_BUF))){
+      bp_clear_buf(SERDES_RX_BUF);
+      got_packet = true;
+
+      hal_toggle_leds(0x2);
+
+      // check packet
+      int last_line = buffer_pool_status->last_line[SERDES_RX_BUF]-1;
+      bool ok = check_packet(buffer_ram(SERDES_RX_BUF), last_line);
+      
+      if (ok)
+       putchar('r');
+      else
+       putchar('P');
+
+      // start a receive from sd
+      zero_buffer(SERDES_RX_BUF);
+      bp_receive_to_buf(SERDES_RX_BUF, PORT_SERDES, 1, 0, BP_LAST_LINE);
+    }
+
+    if (status & (BPS_ERROR(SERDES_RX_BUF))){
+      bp_clear_buf(SERDES_RX_BUF);
+      got_packet = true;
+
+      putchar('E');
+
+      // start a receive from sd
+      zero_buffer(SERDES_RX_BUF);
+      bp_receive_to_buf(SERDES_RX_BUF, PORT_SERDES, 1, 0, BP_LAST_LINE);
+    }
+
+    if (status & (BPS_DONE(SERDES_TX_BUF))){
+      bp_clear_buf(SERDES_TX_BUF);
+      putchar('t');
+      hal_toggle_leds(0x1);
+    }
+
+    if (status & BPS_ERROR(SERDES_TX_BUF)){
+      bp_clear_buf(SERDES_TX_BUF);
+      putchar('X');
+    }
+
+#if 1
+    int pending = pic_regs->pending;
+    if (pending & PIC_TIMER_INT){
+      hal_set_timeout(timer_delta);
+
+      if (EXPECTING_PKT()){
+       if (!got_packet)
+         putchar('T');
+       got_packet = false;
+      }
+
+      if (SEND_PKT()){
+       if (status & BPS_IDLE(SERDES_TX_BUF))
+         bp_send_from_buf(SERDES_TX_BUF, PORT_SERDES, 1, 0, NLINES_PER_PKT);
+      }
+      counter++;
+
+      pic_regs->pending = PIC_TIMER_INT;       // clear pending interrupt
+    }
+#endif
+  }
+
+  return 1;
+}