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[Commit-gnuradio] r7189 - in usrp2/trunk/firmware: apps lib
From: |
eb |
Subject: |
[Commit-gnuradio] r7189 - in usrp2/trunk/firmware: apps lib |
Date: |
Fri, 14 Dec 2007 23:41:53 -0700 (MST) |
Author: eb
Date: 2007-12-14 23:41:53 -0700 (Fri, 14 Dec 2007)
New Revision: 7189
Added:
usrp2/trunk/firmware/lib/ad9777.c
usrp2/trunk/firmware/lib/ad9777.h
usrp2/trunk/firmware/lib/ad9777_regs.h
Modified:
usrp2/trunk/firmware/apps/tx_standalone.c
usrp2/trunk/firmware/lib/Makefile.am
usrp2/trunk/firmware/lib/u2_init.c
Log:
tx test case decim=64, 250 samples
Modified: usrp2/trunk/firmware/apps/tx_standalone.c
===================================================================
--- usrp2/trunk/firmware/apps/tx_standalone.c 2007-12-15 02:44:00 UTC (rev
7188)
+++ usrp2/trunk/firmware/apps/tx_standalone.c 2007-12-15 06:41:53 UTC (rev
7189)
@@ -234,9 +234,9 @@
bp_clear_buf(DSP_TX_BUF_0); // FIXME, really goes in state machine
bp_clear_buf(DSP_TX_BUF_1);
- // fill everything with a constant 10k + 10kj
+ // fill everything with a constant 32k + 0j
- uint32_t const_sample = (10000 << 16) | 10000;
+ uint32_t const_sample = (32000 << 16) | 0;
int i;
for (i = 0; i < BUFFER_POOL_BUFFER_SIZE; i++){
buffer_ram(DSP_TX_BUF_0)[i] = const_sample;
@@ -262,10 +262,10 @@
int tx_scale = 256;
// setup Tx DSP regs
- dsp_tx_regs->clear_state = 1; // reset
- dsp_tx_regs->freq = MASTER_CLK_RATE / 10000000; // 10 MHz
+ dsp_tx_regs->clear_state = 1; // reset
+ dsp_tx_regs->freq = 429496729; // 10MHz [2**32 * fc/fsample]
dsp_tx_regs->scale_iq = (tx_scale << 16) | tx_scale;
- dsp_tx_regs->interp_rate = 19; // register gets N - 1
+ dsp_tx_regs->interp_rate = 31; // register gets N - 1
// kick off the state machine
// dbsm_start(&dsp_rx_sm);
Modified: usrp2/trunk/firmware/lib/Makefile.am
===================================================================
--- usrp2/trunk/firmware/lib/Makefile.am 2007-12-15 02:44:00 UTC (rev
7188)
+++ usrp2/trunk/firmware/lib/Makefile.am 2007-12-15 06:41:53 UTC (rev
7189)
@@ -21,6 +21,7 @@
libu2fw.a
libu2fw_a_SOURCES = \
+ ad9777.c \
buffer_pool.c \
dbsm.c \
eeprom.c \
Added: usrp2/trunk/firmware/lib/ad9777.c
===================================================================
--- usrp2/trunk/firmware/lib/ad9777.c (rev 0)
+++ usrp2/trunk/firmware/lib/ad9777.c 2007-12-15 06:41:53 UTC (rev 7189)
@@ -0,0 +1,43 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2007 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "ad9777.h"
+#include "memory_map.h"
+#include "spi.h"
+
+#define IB_RD 0x80
+#define IB_WR 0x00
+#define IB_XFER_1 0x00
+#define IB_XFER_2 0x20
+#define IB_XFER_3 0x40
+#define IB_XFER_4 0x60
+#define IB_ADDR_MASK 0x1f
+
+void
+ad9777_write_reg(int regno, uint8_t value)
+{
+ uint8_t instr = IB_WR | IB_XFER_1 | (regno & IB_ADDR_MASK);
+ spi_transact(SPI_TXONLY, SPI_SS_AD9777, (instr << 8) | (value & 0xff), 16,
0);
+}
+
+int
+ad9777_read_reg(int regno)
+{
+ uint8_t instr = IB_RD | IB_XFER_1 | (regno & IB_ADDR_MASK);
+ return spi_transact(SPI_TXRX, SPI_SS_AD9777, (instr << 8) | 0, 16, 0);
+}
Property changes on: usrp2/trunk/firmware/lib/ad9777.c
___________________________________________________________________
Name: svn:eol-style
+ native
Added: usrp2/trunk/firmware/lib/ad9777.h
===================================================================
--- usrp2/trunk/firmware/lib/ad9777.h (rev 0)
+++ usrp2/trunk/firmware/lib/ad9777.h 2007-12-15 06:41:53 UTC (rev 7189)
@@ -0,0 +1,28 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2007 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef INCLUDED_AD9777_H
+#define INCLUDED_AD9777_H
+
+#include <stdint.h>
+#include "ad9777_regs.h"
+
+void ad9777_write_reg(int regno, uint8_t value);
+int ad9777_read_reg(int regno);
+
+
+#endif /* INCLUDED_AD9777_H */
Property changes on: usrp2/trunk/firmware/lib/ad9777.h
___________________________________________________________________
Name: svn:eol-style
+ native
Added: usrp2/trunk/firmware/lib/ad9777_regs.h
===================================================================
--- usrp2/trunk/firmware/lib/ad9777_regs.h (rev 0)
+++ usrp2/trunk/firmware/lib/ad9777_regs.h 2007-12-15 06:41:53 UTC (rev
7189)
@@ -0,0 +1,64 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2007 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef INCLUDED_AD9777_REGS_H
+#define INCLUDED_AD9777_REGS_H
+
+#define R0_SW_RESET (1 << 5)
+#define R0_SLEEP (1 << 4)
+#define R0_POWER_DN (1 << 3)
+#define R0_1R (1 << 2)
+#define R0_2R (0 << 2)
+#define RO_PLL_LOCKED (1 << 1)
+
+#define R1_INTERP_1X 0x00
+#define R1_INTERP_2X 0x40
+#define R1_INTERP_4X 0x80
+#define R1_INTERP_8X 0xC0
+#define R1_MOD_NONE 0x00
+#define R1_MOD_FS_2 0x10 // Fs/2
+#define R1_MOD_FS_4 0x20 // Fs/4
+#define R1_MOD_FS_8 0x30 // Fs/8
+#define R1_ZERO_STUFF (1 << 3) // N.B., doubles output rate
+#define R1_REAL_MIX (1 << 2)
+#define R1_CMPLX_MIX (0 << 2)
+#define R1_POS_EXP (1 << 1) // exp(+jwt)
+#define R1_NEG_EXP (0 << 1) // exp(-jwt)
+#define R1_DATACLK_OUT (1 << 0)
+
+#define R2_2S_COMP (1 << 7)
+#define R2_2PORT_MODE (0 << 6)
+#define R2_1PORT_MODE (1 << 6)
+
+#define R3_PLL_DIV_1 0x00
+#define R3_PLL_DIV_2 0x01
+#define R3_PLL_DIV_4 0x02
+#define R3_PLL_DIV_8 0x03
+
+#define R4_PLL_ON (1 << 7)
+#define R4_CP_MANUAL (1 << 6)
+#define R4_CP_AUTO (0 << 6)
+#define R4_CP_50uA (0x00 | R4_CP_MANUAL)
+#define R4_CP_100uA (0x01 | R4_CP_MANUAL)
+#define R4_CP_200uA (0x02 | R4_CP_MANUAL)
+#define R4_CP_400uA (0x03 | R4_CP_MANUAL)
+#define R4_CP_800uA (0x07 | R4_CP_MANUAL)
+
+// FIXME more registers for offset and gain control...
+
+
+#endif /* INCLUDED_AD9777_REGS_H */
Property changes on: usrp2/trunk/firmware/lib/ad9777_regs.h
___________________________________________________________________
Name: svn:eol-style
+ native
Modified: usrp2/trunk/firmware/lib/u2_init.c
===================================================================
--- usrp2/trunk/firmware/lib/u2_init.c 2007-12-15 02:44:00 UTC (rev 7188)
+++ usrp2/trunk/firmware/lib/u2_init.c 2007-12-15 06:41:53 UTC (rev 7189)
@@ -25,6 +25,7 @@
#include "i2c.h"
#include "bool.h"
#include "mdelay.h"
+#include "ad9777.h"
/*
* We ought to arrange for this to be called before main, but for now,
@@ -33,6 +34,8 @@
bool
u2_init(void)
{
+ int i;
+
// Set GPIOs to inputs
hal_gpio_set_rx_mode(15, 0, GPIOM_INPUT);
hal_gpio_set_tx_mode(15, 0, GPIOM_INPUT);
@@ -65,11 +68,18 @@
spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005380, 24, 0); // Bypass Div #5
spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs
- spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000004, 16, 0); // Single-R mode
+ //spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000004, 16, 0); // Single-R
mode
//spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000140, 16, 0); //
//spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000301, 16, 0); // PLL =
//spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000480, 16, 0); // PLL on,
automatic
+ ad9777_write_reg(0, R0_1R);
+ ad9777_write_reg(1, R1_INTERP_1X | R1_REAL_MIX);
+ ad9777_write_reg(2, 0);
+ ad9777_write_reg(3, 0);
+ ad9777_write_reg(4, 0);
+ for (i = 5; i < 12; i++) // gain and offset regs
+ ad9777_write_reg(i, 0);
// Set up serdes
//output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_LOOPEN | SERDES_RXEN);
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