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[Commit-gnuradio] r7123 - in usrp2/trunk/firmware: apps lib


From: eb
Subject: [Commit-gnuradio] r7123 - in usrp2/trunk/firmware: apps lib
Date: Wed, 12 Dec 2007 00:26:43 -0700 (MST)

Author: eb
Date: 2007-12-12 00:26:41 -0700 (Wed, 12 Dec 2007)
New Revision: 7123

Added:
   usrp2/trunk/firmware/apps/rx_only.c
Modified:
   usrp2/trunk/firmware/apps/
   usrp2/trunk/firmware/apps/Makefile.am
   usrp2/trunk/firmware/apps/gen_eth_packets.c
   usrp2/trunk/firmware/apps/rcv_eth_packets.c
   usrp2/trunk/firmware/lib/eth_mac.c
   usrp2/trunk/firmware/lib/eth_mac.h
   usrp2/trunk/firmware/lib/memory_map.h
   usrp2/trunk/firmware/lib/u2_eth_packet.h
Log:
work-in-progress


Property changes on: usrp2/trunk/firmware/apps
___________________________________________________________________
Name: svn:ignore
   - *-stamp
*.a
*.bin
*.dump
*.log
*.rom
.deps
Makefile
Makefile.in
aclocal.m4
autom4te.cache
blink_leds
blink_leds2
build
compile
config.h
config.h.in
config.log
config.status
configure
depcomp
eth_test
gen_eth_packets
ibs_rx_test
ibs_tx_test
install-sh
libtool
ltmain.sh
missing
py-compile
rcv_eth_packets
run_tests.sh
stamp-h1
test1
test_phy_comm
timer_test
buf_ram_test
buf_ram_zero
hello
test_printf
test_spi
test_i2c
gen_pause_frames
test_serdes

   + *-stamp
*.a
*.bin
*.dump
*.log
*.rom
.deps
Makefile
Makefile.in
aclocal.m4
autom4te.cache
blink_leds
blink_leds2
build
compile
config.h
config.h.in
config.log
config.status
configure
depcomp
eth_test
gen_eth_packets
ibs_rx_test
ibs_tx_test
install-sh
libtool
ltmain.sh
missing
py-compile
rcv_eth_packets
run_tests.sh
stamp-h1
test1
test_phy_comm
timer_test
buf_ram_test
buf_ram_zero
hello
test_printf
test_spi
test_i2c
gen_pause_frames
test_serdes
rx_only


Modified: usrp2/trunk/firmware/apps/Makefile.am
===================================================================
--- usrp2/trunk/firmware/apps/Makefile.am       2007-12-12 05:03:07 UTC (rev 
7122)
+++ usrp2/trunk/firmware/apps/Makefile.am       2007-12-12 07:26:41 UTC (rev 
7123)
@@ -30,6 +30,7 @@
        ibs_rx_test \
        ibs_tx_test \
        rcv_eth_packets \
+       rx_only \
        test1 \
        test_i2c \
        test_phy_comm \

Modified: usrp2/trunk/firmware/apps/gen_eth_packets.c
===================================================================
--- usrp2/trunk/firmware/apps/gen_eth_packets.c 2007-12-12 05:03:07 UTC (rev 
7122)
+++ usrp2/trunk/firmware/apps/gen_eth_packets.c 2007-12-12 07:26:41 UTC (rev 
7123)
@@ -142,8 +142,8 @@
   }
   pkt.ehdr.ethertype = U2_ETHERTYPE;
   pkt.ehdr._pad = 0x5555;
-  pkt.payload.word0 = 0x01234567;
-  pkt.payload.timestamp = 0xffffffff;
+  pkt.fixed.word0 = 0x01234567;
+  pkt.fixed.timestamp = 0xffffffff;
 
   // fill ALL buffers for debugging
   for (i = 0; i < 8; i++)

Modified: usrp2/trunk/firmware/apps/rcv_eth_packets.c
===================================================================
--- usrp2/trunk/firmware/apps/rcv_eth_packets.c 2007-12-12 05:03:07 UTC (rev 
7122)
+++ usrp2/trunk/firmware/apps/rcv_eth_packets.c 2007-12-12 07:26:41 UTC (rev 
7123)
@@ -179,7 +179,7 @@
   bp_receive_to_buf(2, PORT_ETH, 1, 0, 511);
 
   while(1){
-    u2_eth_packet_t    pkt __attribute__((aligned (4)));
+    u2_eth_packet_t    pkt;
 
     new_leds = 0;
     if (link_is_up)

Copied: usrp2/trunk/firmware/apps/rx_only.c (from rev 7118, 
usrp2/trunk/firmware/apps/gen_eth_packets.c)
===================================================================
--- usrp2/trunk/firmware/apps/rx_only.c                         (rev 0)
+++ usrp2/trunk/firmware/apps/rx_only.c 2007-12-12 07:26:41 UTC (rev 7123)
@@ -0,0 +1,258 @@
+/*
+ * Copyright 2007 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "u2_init.h"
+#include "memory_map.h"
+#include "spi.h"
+#include "hal_io.h"
+#include "buffer_pool.h"
+#include "pic.h"
+#include "bool.h"
+#include "eth_driver.h"
+#include "eth_mac.h"
+#include "nonstdio.h"
+#include "u2_eth_packet.h"
+#include "memcpy_wa.h"
+#include <stddef.h>
+#include <stdlib.h>
+#include <string.h>
+
+#define        _AL4 __attribute__((aligned (4)))
+
+/*
+ * This program can respond to queries from the host
+ * and stream rx samples.
+ *
+ * Buffer 0 is used for rcvd frames from ethernet
+ * Buffer 1 is used by the cpu to send frames to the host.
+ * Buffers 2 and 3 are used to double-buffer the DSP Rx to eth flow
+ */
+#define CPU_RX_BUF     0       // eth -> cpu
+#define        CPU_TX_BUF      1       // cpu -> eth
+#define        DSP_RX_BUF_0    2       // dsp rx -> eth (double buffer)
+#define        DSP_RX_BUF_1    3       // dsp rx -> eth
+
+
+void link_changed_callback(int speed);
+
+static volatile bool link_is_up = false;       // eth handler sets this
+
+
+// The mac address of the host we're sending to.
+unsigned char host_mac_addr[6];
+
+
+static int timer_delta = MASTER_CLK_RATE/1000; // tick at 1kHz
+
+void
+timer_irq_handler(unsigned irq)
+{
+  hal_set_timeout(timer_delta);        // schedule next timeout
+}
+
+
+static void
+set_reply_hdr(u2_eth_packet_t *reply_pkt, u2_eth_packet_t const *cmd_pkt)
+{
+  memcpy(reply_pkt->ehdr.dst_addr, cmd_pkt->ehdr.src_addr, 6);
+  reply_pkt->ehdr.ethertype = U2_ETHERTYPE;
+  reply_pkt->ehdr._pad = 0;
+  u2p_set_word0(&reply_pkt->fixed, 0, CONTROL_CHAN);
+  reply_pkt->fixed.timestamp = timer_regs->time;
+}
+
+static void
+handle_control_chan_frame(int bufno, u2_eth_packet_t *pkt)
+{
+  unsigned char buf[512];
+  unsigned char reply[sizeof(u2_eth_packet_t) + sizeof(u2_subpkt_t)] _AL4;
+  unsigned char *s = &reply[sizeof(u2_eth_packet_t)];
+  size_t reply_len = 0;
+
+  // FIXME check packet length...
+  // copy 512 bytes of payload into stack buffer
+
+  unsigned char *src =
+    (unsigned char *) buffer_ram(bufno) + offsetof(u2_eth_packet_t, 
fixed.payload);
+
+  memcpy_wordaligned(buf, src, sizeof(buf));
+
+  unsigned char *p = buf;
+  int opcode = p[0];
+  switch(opcode){
+  case OP_ID:
+    memset(reply, 0, sizeof(reply));
+    set_reply_hdr((u2_eth_packet_t *) reply, pkt);
+    {
+      op_id_reply_t *r = (op_id_reply_t *) s;
+      reply_len = sizeof(u2_eth_packet_t) + sizeof(op_id_reply_t);
+      r->opcode = OP_ID_REPLY;
+      r->len = sizeof(op_id_reply_t);
+      r->rid_mbz = 0;          // FIXME
+      memcpy(r->mac_addr, eth_mac_addr(), sizeof(r->mac_addr));
+      r->hw_rev = 0x0000;      // FIXME
+      // r->serial_no = ;      // FIXME
+      // r->fpga_md5sum = ;    // FIXME
+      // r->sw_md5sum = ;      // FIXME
+    }
+
+    // FIXME need to see if ethernet tx is busy
+
+    // copy reply into CPU_TX_BUF
+    memcpy_wordaligned(buffer_ram(CPU_TX_BUF), reply, reply_len);
+
+    bp_send_from_buf(CPU_TX_BUF, PORT_ETH, 1, 0, reply_len / 4);
+
+    // FIXME shouldn't really wait here
+    while ((buffer_pool_status->status & BPS_DONE(CPU_TX_BUF)) == 0)
+      ;
+    bp_clear_buf(CPU_TX_BUF);
+    break;
+    
+    
+  case OP_START_RX:
+  case OP_STOP_RX:
+  default:
+    break;
+  }
+}
+
+static void
+handle_rcvd_eth_frame(int bufno)
+{
+  u2_eth_packet_t pkt;
+
+  // inspect rcvd frame and figure out what do do.
+
+  // copy first part of frame to stack buffer so we can byte address it
+  memcpy_wordaligned(&pkt, (void *)buffer_ram(bufno), sizeof(pkt));
+
+  if (pkt.ehdr.ethertype != U2_ETHERTYPE)
+    return;            // ignore, probably bogus PAUSE frame from MAC
+
+  int chan = u2p_chan(&pkt.fixed);
+
+  switch (chan){
+  case CONTROL_CHAN:
+    handle_control_chan_frame(bufno, &pkt);
+    break;
+
+  case 0:      // to Tx DSP
+  default:
+    break;
+  }
+}
+
+void
+buffer_irq_handler(unsigned irq)
+{
+  uint32_t  status = buffer_pool_status->status;
+
+  if (status & BPS_ERROR_ALL){
+    // FIXME rare path, handle error conditions
+  }
+
+  // FIXME probably ought to round-robin the check for done
+
+  if (status & BPS_DONE(CPU_RX_BUF)){  // we've rcvd a frame from ethernet
+    bp_clear_buf(0);
+    handle_rcvd_eth_frame(CPU_RX_BUF);
+    bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, 255);
+  }
+
+  // FIXME if we're streaming...
+  
+}
+
+int
+main(void)
+{
+  u2_init();
+
+  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
+  hal_gpio_set_tx_mode(15, 0, GPIOM_FPGA_0);
+  hal_gpio_set_rx_mode(15, 0, GPIOM_FPGA_0);   // no printing...
+
+  putstr("\nrx_only\n");
+  
+  // Control LEDs
+  hal_set_leds(0x0, 0x3);
+
+  pic_register_handler(IRQ_BUFFER, buffer_irq_handler);
+
+  //pic_register_handler(IRQ_TIMER, timer_irq_handler);
+  //hal_set_timeout(timer_delta);
+
+  eth_driver_register_link_changed_callback(link_changed_callback);
+
+  eth_mac_init();
+  eth_driver_init();
+
+  // FIXME initialize state machine
+
+  // setup receive from ETH
+  bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, 255);
+
+  while(1){
+    // FIXME perhaps handle low-pri stuff here
+  }
+}
+
+// ----------------------------------------------------------------
+
+// debugging output on tx pins
+#define LS_MASK  0xE0000
+#define LS_1000  0x80000
+#define LS_100   0x40000
+#define LS_10    0x20000
+
+/*
+ * Called when eth phy state changes (w/ interrupts disabled)
+ */
+void
+link_changed_callback(int speed)
+{
+  int v = 0;
+  switch(speed){
+  case 10:
+    v = LS_10;
+    link_is_up = true;
+    break;
+    
+  case 100:
+    v = LS_100;
+    link_is_up = true;
+    break;
+    
+  case 1000:
+    v = LS_100;
+    link_is_up = true;
+    break;
+
+  default:
+    v = 0;
+    link_is_up = false;
+    break;
+  }
+
+  hal_gpio_set_tx(v, LS_MASK); /* set debug bits on d'board */
+
+  hal_set_leds(link_is_up ? 0x2 : 0x0, 0x2);
+
+  putstr("\neth link changed: speed = ");
+  puthex16_nl(speed);
+}

Modified: usrp2/trunk/firmware/lib/eth_mac.c
===================================================================
--- usrp2/trunk/firmware/lib/eth_mac.c  2007-12-12 05:03:07 UTC (rev 7122)
+++ usrp2/trunk/firmware/lib/eth_mac.c  2007-12-12 07:26:41 UTC (rev 7123)
@@ -25,15 +25,15 @@
 
 #define PHY_ADDR 1
 
+// FIXME extract src_mac_addr from EEPROM
+
+static unsigned char src_mac_addr[6] = {
+  0x00, 0x0A, 0x35, 0x98, 0x76, 0x54
+};
+
 void 
 eth_mac_init()
 {
-  // FIXME extract src_mac_addr from EEPROM
-
-  static unsigned char src_mac_addr[6] = {
-    0x00, 0x0A, 0x35, 0x98, 0x76, 0x54
-  };
-
   int i;
   // FIXME more to do?
 
@@ -131,3 +131,9 @@
 
   return eth_mac->miistatus;
 }
+
+const unsigned char *
+eth_mac_addr(void)
+{
+  return src_mac_addr;
+}

Modified: usrp2/trunk/firmware/lib/eth_mac.h
===================================================================
--- usrp2/trunk/firmware/lib/eth_mac.h  2007-12-12 05:03:07 UTC (rev 7122)
+++ usrp2/trunk/firmware/lib/eth_mac.h  2007-12-12 07:26:41 UTC (rev 7123)
@@ -25,5 +25,6 @@
 void eth_mac_miim_write(int addr, int value);
 int  eth_mac_miim_read_status(void);
 
+const unsigned char *eth_mac_addr(void);  // FIXME move to eth_driver
 
 #endif /* INCLUDED_ETH_MAC_H */

Modified: usrp2/trunk/firmware/lib/memory_map.h
===================================================================
--- usrp2/trunk/firmware/lib/memory_map.h       2007-12-12 05:03:07 UTC (rev 
7122)
+++ usrp2/trunk/firmware/lib/memory_map.h       2007-12-12 07:26:41 UTC (rev 
7123)
@@ -50,7 +50,7 @@
 #define BUFFER_POOL_BUFFER_SIZE 0x0200  // Buffer size in 32-bit lines
 
 #define buffer_pool_ram \
-  ((volatile uint32_t *) BUFFER_POOL_RAM_BASE)
+  ((uint32_t *) BUFFER_POOL_RAM_BASE)
 
 #define buffer_ram(n) (&buffer_pool_ram[(n) * BUFFER_POOL_BUFFER_SIZE])
 
@@ -177,6 +177,9 @@
 #define        BPS_DONE_5      0x0020        // buffer 5 xfer is done
 #define        BPS_DONE_6      0x0040        // buffer 6 xfer is done
 #define        BPS_DONE_7      0x0080        // buffer 7 xfer is done
+#define BPS_DONE(n)     (BPS_DONE_0 << (n))
+
+
 #define BPS_ERROR_0    0x0100        // buffer 0 xfer had error
 #define        BPS_ERROR_1     0x0200        // buffer 1 xfer had error
 #define        BPS_ERROR_2     0x0400        // buffer 2 xfer had error
@@ -185,7 +188,11 @@
 #define        BPS_ERROR_5     0x2000        // buffer 5 xfer had error
 #define        BPS_ERROR_6     0x4000        // buffer 6 xfer had error
 #define        BPS_ERROR_7     0x8000        // buffer 7 xfer had error
+#define BPS_ERROR(n)   (BPS_ERROR_0 << (n))
 
+#define BPS_DONE_ALL   0x00ff        // mask of all done
+#define BPS_ERROR_ALL  0xff00        // mask of all errors
+
 // The hw_config register
 
 #define        HWC_SIMULATION          0x80000000

Modified: usrp2/trunk/firmware/lib/u2_eth_packet.h
===================================================================
--- usrp2/trunk/firmware/lib/u2_eth_packet.h    2007-12-12 05:03:07 UTC (rev 
7122)
+++ usrp2/trunk/firmware/lib/u2_eth_packet.h    2007-12-12 07:26:41 UTC (rev 
7123)
@@ -50,7 +50,7 @@
 
 
 /*
- * The payload of a USRP2 ethernet packet...
+ * The fixed header of a USRP2 ethernet packet...
  *
  * Basically there's 1 word of flags and routing info, and 1 word
  * of timestamp that specifies when the data was received, or
@@ -77,8 +77,8 @@
 typedef struct {
   uint32_t     word0;          // flags etc
   uint32_t     timestamp;      // time of rx or tx (100 MHz)
-  uint32_t     samples[];      // samples, typically ((I << 16) | Q)
-} u2_eth_payload_t;
+  uint32_t     payload[];      // samples, typically ((I << 16) | Q)
+} u2_eth_fixed_hdr_t;
 
 
 #define U2P_CHAN_MASK          0x1f
@@ -90,14 +90,16 @@
 
 #define        U2P_ALL_FLAGS           0x00000007
 
+#define        CONTROL_CHAN            0x1f
+
 static inline int
-u2p_chan(u2_eth_payload_t *p)
+u2p_chan(u2_eth_fixed_hdr_t *p)
 {
   return (p->word0 >> U2P_CHAN_SHIFT) & U2P_CHAN_MASK;
 }
 
 inline static void
-u2p_set_word0(u2_eth_payload_t *p, int flags, int chan)
+u2p_set_word0(u2_eth_fixed_hdr_t *p, int flags, int chan)
 {
   p->word0 = ((flags & U2P_ALL_FLAGS)
              | ((chan & U2P_CHAN_MASK) << U2P_CHAN_SHIFT));
@@ -108,7 +110,60 @@
  */
 typedef struct {
   u2_eth_hdr_with_pad_t        ehdr;
-  u2_eth_payload_t     payload;
+  u2_eth_fixed_hdr_t   fixed;
 } u2_eth_packet_t;
 
+/*
+ * Opcodes for control channel
+ */
+#define OP_ID                  0
+#define        OP_ID_REPLY             1
+#define        OP_PING_FIXED           2
+#define        OP_PING_FIXED_REPLY     3
+#define        OP_START_RX             4
+#define        OP_STOP_RX              5
+#define        OP_WRITE_REG            6
+#define        OP_WRITE_REG_MASKED     7
+#define        OP_READ_REG             8
+#define        OP_READ_REG_REPLY       9
+
+typedef struct {
+  uint8_t      opcode;
+  uint8_t      len;
+  uint16_t     rid_mbz;
+} op_id_t;
+
+
+typedef struct {
+  uint8_t      opcode;
+  uint8_t      len;
+  uint16_t     rid_mbz;
+  uint8_t      mac_addr[6];
+  uint16_t     hw_rev;
+  uint8_t      serial_no[8];
+  uint8_t      fpga_md5sum[16];
+  uint8_t      sw_md5sum[16];
+} op_id_reply_t;
+
+typedef struct {
+  uint8_t      opcode;
+  uint8_t      len;
+  uint16_t     mbz;
+} op_start_rx_t;
+
+typedef struct {
+  uint8_t      opcode;
+  uint8_t      len;
+  uint16_t     mbz;
+} op_stop_rx_t;
+
+
+typedef union {
+  op_id_t      op_id;
+  op_id_reply_t        op_id_reply;
+  op_start_rx_t        op_start_rx;
+  op_stop_rx_t op_stop_rx;
+} u2_subpkt_t;
+
+
 #endif /* INCLUDED_U2_ETH_PACKET_H */





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