[Commit-gnuradio] r7023 - usrp2/trunk/fpga/opencores/aemb/rtl/verilog

[matt]

Author: matt
Date: 2007-11-26 00:17:02 -0700 (Mon, 26 Nov 2007)
New Revision: 7023

Modified:
   usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v
Log:
commited to the new core version


Modified: usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v
===================================================================
--- usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v  2007-11-26 
07:00:56 UTC (rev 7022)
+++ usrp2/trunk/fpga/opencores/aemb/rtl/verilog/aeMB_core_BE.v  2007-11-26 
07:17:02 UTC (rev 7023)
@@ -30,8 +30,6 @@
 
    assign  dwb_cyc_o = dwb_stb_o;
 
-`define NEW_AEMB 1
-`ifdef NEW_AEMB
    aeMB_edk32 #(.IW(ISIZ),.DW(DSIZ),.MUL(0),.BSF(0))
      aeMB_edk32 (.sys_clk_i(sys_clk_i), 
                 .sys_rst_i(sys_rst_i),
@@ -50,6 +48,7 @@
                 .dwb_dat_o(dwb_dat_o),
        
                 .fsl_wre_o(),
+                .fsl_tag_o(),
                 .fsl_stb_o(),
                 .fsl_dat_o(),
                 .fsl_adr_o(),
@@ -59,24 +58,5 @@
    
    assign  iwb_adr_o[1:0] = 2'b0;
    assign  dwb_adr_o[1:0] = 2'b0;
-`else
-   aeMB_core #(.ISIZ(ISIZ),.DSIZ(DSIZ))
-     aeMB_core (.sys_clk_i(sys_clk_i), 
-               .sys_rst_i(~sys_rst_i),
-               
-               .iwb_stb_o(iwb_stb_o),
-               .iwb_adr_o(iwb_adr_o),
-               .iwb_ack_i(iwb_ack_i),
-               .iwb_dat_i(iwb_dat_i),
-               
-               .dwb_we_o(dwb_we_o),
-               .dwb_stb_o(dwb_stb_o),
-               .dwb_adr_o(dwb_adr_o),
-               .dwb_ack_i(dwb_ack_i),
-               .dwb_sel_o(dwb_sel_o),
-               .dwb_dat_i(dwb_dat_i),
-               .dwb_dat_o(dwb_dat_o),
-               
-               .sys_int_i(sys_int_i) );
-`endif   
+
 endmodule // aeMB_core_BE