Ivan Shmakov <address@hidden> writes:
felix winkelmann <address@hidden> writes:
[...]
>>> Actually, I'm planning a build system rewrite which, by utilising
>>> some of the GNU Make features, will make the build system /much
>>> more/ manageable. I've already reduced rules.make down to 38 KiB
>>> (i. e., by 40%) and it doesn't look that I'm going to stop just
>>> yet.
>> Reducing size isn't everything. I'd rather have simple makefiles
>> than complex ones, even if their bigger.
> My point is that the code duplication increases complexity.
And, well, I have some trouble understanding the manageability
or even readability of the Makefile fragments like the
following:
--cut--
FOO-1$(O): FOO-1.c
COMPILE-IT
FOO-2$(O): FOO-2.c
COMPILE-IT
[ ... 74 lines skipped... ]
FOO-40$(O): FOO-40.c
COMPILE-IT
--cut--
Rather, I'd have:
--cut--
FOO_SOURCES = FOO-1.c FOO-2.c ... FOO-40.c
FOO_OBJECTS = $(FOO_SOURCES:.c=$(O))
$(FOO_OBJECTS) : %$(O) : %.c
COMPILE-IT
--cut--
Would there be more dependencies for FOO-N objects, I'd add them
as follows:
$(FOO_OBJECTS) : GENERIC-FOO-DEPENDENCIES
FOO-X$(O) FOO-Y$(O) : SPECIFIC-FOO-X-Y-DEPENDENCIES
FOO-Z$(O) : SPECIFIC-FOO-Z-DEPENDENCIES
Furthermore, I'd suggest using the C compiler to compute
dependencies, and not to hardcode them in the makefile.
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