Re: A problem in Makefile

[Henning Makholm]

Scripsit ARPITA SAXENA <address@hidden>

>         I have made a makefile 'Makefile_rm' . While invoking it's all
> target, everything workis fine except that at the end an 'rm ' command
> is invoked for all the .cpp files using the '%.o' default rule .

That sounds like the standard, documented, make behavior: If a file is
never mentioned by its complete name in any rule and it doesn't
already exist, make will deem it an "intermediate file" that you don't
really want to have lying around between makes.

Look at the node "Chained Rules" in the make manual, or search for the
description ".PRECIOUS" pseudo-target.

> $(MODULE)/src/%.h : $(CVSROOT)/$(MODULE)/src/%.h,v
>       cvs export -r $(TAG) $@
>       touch $@
> $(MODULE)/src/%.cpp : $(CVSROOT)/$(MODULE)/src/%.cpp,v
>       cvs export -r $(TAG) $(MODULE)/src/$(*F).cpp
>       touch $@

By the way, this looks like a really roundabout way of doing something
that could be accomplished just by saying 
 
all : cvs_update TlWsPPFend TlWsPPDaemon
.PHONY: cvs_update
cvs_update:
        cvs update

Or am I missing something?

-- 
Henning Makholm                        "I ... I have to return some videos."