Re: cache coherency in DMA and MMIO

[Da Zheng]

On 10-4-22 下午11:01, Samuel Thibault wrote:
> Samuel Thibault, le Thu 22 Apr 2010 16:51:38 +0200, a écrit :
>> Da Zheng, le Thu 22 Apr 2010 22:37:51 +0800, a écrit :
>>> So does the driver need to consider about cache coherency problems on PC 
>>> when
>>> interacting with the external device?
>>
>> Yes (since you can not rely on the BIOS), you need to remap the mmio
>> range with cache disabled: INTEL_PTE_NCACHE|INTEL_PTE_WTHRU. This should
>> already be done by pmap_enter().
> 
> And you need to access it using the volatile qualifier.
They are not just one or two variables. They are an array of structure
variables. Should I define all fields of the structure with volatile qualifier?
It's strange. The Linux driver doesn't do so but it definitely works in the
Linux kernel.

I use the mem device to allocate MMIO space. I guess INTEL_PTE_NCACHE and
INTEL_PTE_WTHRU haven't been set to the MMIO pages, right?

Zheng Da