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[Bug gas/23126] SVC instruction is rejected for ARM Cortex-M0


From: nickc at redhat dot com
Subject: [Bug gas/23126] SVC instruction is rejected for ARM Cortex-M0
Date: Wed, 02 May 2018 09:14:10 +0000

https://sourceware.org/bugzilla/show_bug.cgi?id=23126

--- Comment #4 from Nick Clifton <nickc at redhat dot com> ---
Hi Freddie,

> Hmmm... It seems that the problem is not entirely in GAS, but in GCC 8 (RC)
> as well...

Actually, I think that you have found a separate gas bug^H^H feature...

> So it seems that if you have both `-mcpu=cortex-m0 -march=armv6-m` then GAS
> has no problem with that.

> However if both CPU and ARCH are specified with
> directives in the file, then GAS doesn't like this:

Right - it turns out that command line options are additive, so if you specify
-march=armv6-m -mcpu=cortx-m0 you get the features of both the architecture and
cpu enabled, even if they are not the same.  (This also applies if the options
are specified in the opposite order).

But - directives inside the assembler source file override any previous
directives or command line options.  So if you have:

  .cpu cortex-m0
  .arch armv6-m

then you *only* get the features of the V6M architecture and not any other
features that might be present in the cortex-m0.

The other important point to note here is that the assembler's "armv6-m"
architecture does *not* support the SVC instruction.  In order to support that
you must use the "armv6s-m" architecture.  The "s" in that string refers to the
OS extension to the base V6M architecture, which in this case means the SVC
instruction.

Note - the assembler does know that the cortex-m0 supports the SVC instruction,
but that is because internally it has a table that says that the cortex-m0 uses
the armv6s-m architecture.  This explains why your svc-directive.s test fails
to assemble.  It has the .arch directive after the .cpu directive and it uses
the wrong architecture name.

With regard to the "ARMv6-M Architecture Reference Manual" entry:

  In an ARMv6-M implementation that does not include the Unprivileged/
  Privileged Extension, execution is always privileged. However in 
  such an implementation, application code might use supervisor calls to 
  maintain a software hierarchy with a system kernel.

This does not, to me, mean that the SVC instruction *must* be supported. 
Rather
it says that if the SVC instruction is present in machine code that is running
on a v6-M implementation that does not separate privileged from unprivileged
execution then this should be permitted.

However, I did find this document online, the "Cortex-M0 Devices Generic User
Guide", which clearly shows that the SVC instruction is supported:

 
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0432c/CHDCICDF.html

So all in all, I think that the assembler is not, technically, wrong.  But it
is rather confusing in its behaviour.


> Do you think I should file a bug report for GCC too?

Yes - for a -mcpu=cortex-m0 gcc command line option gcc should be generating a
".arch armv6s-m" directive and not a ".arch armv6-m" directive.  (This
presumably applies to other cortex-m?? variants as well, although I have not
checked).  Alternatively it should just generate a .cpu directive and no
".arch" directive, and leave it up to the assembler to divine the architecture
involved.

Cheers
  Nick

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