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[Bug gas/22598] New: [RISCV] No way to disable two-instruction sequences
From: |
asb at lowrisc dot org |
Subject: |
[Bug gas/22598] New: [RISCV] No way to disable two-instruction sequences for branch or relocation for jal instructions |
Date: |
Wed, 13 Dec 2017 11:04:50 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=22598
Bug ID: 22598
Summary: [RISCV] No way to disable two-instruction sequences
for branch or relocation for jal instructions
Product: binutils
Version: 2.30 (HEAD)
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: asb at lowrisc dot org
Target Milestone: ---
The GNU assembler will always assemble a branch with a numeric offset to
branch+jal (with reloc) and create a relocation for a jal with numeric offset.
I can understand that this is desirable when linker relaxation is being used,
but there doesn't seem to be any command line option for disabling this
behaviour. As well as being surprising/undesirable to some human users, being
able to disable this will also be useful for automated testing software (e.g.
verifying assembly and disassembly of randomly generated instruction
sequences).
$ cat foo.s
beq s1, s0, 102
bne a4, a5, -4096
jal a2, 1048574
$ ./riscv32-unknown-elf-as foo.s
$ ./riscv32-unknown-elf-objdump -d -M no-aliases -r a.out
a.out: file format elf32-littleriscv
Disassembly of section .text:
00000000 <.text>:
0: 00849463 bne s1,s0,0x8
4: 0000006f jal zero,0x4
4: R_RISCV_JAL *ABS*+0x66
8: 00f70463 beq a4,a5,0x10
c: 0000006f jal zero,0xc
c: R_RISCV_JAL *ABS*-0x1000
10: 0000066f jal a2,0x10
10: R_RISCV_JAL *ABS*+0xffffe
The above was performed using HEAD, checked out and built today.
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- [Bug gas/22598] New: [RISCV] No way to disable two-instruction sequences for branch or relocation for jal instructions,
asb at lowrisc dot org <=