Re: [avr-libc-dev] FAQ #27: "Why are interrupts re-enabled in the middle of writing the stack pointer?"

[Schwichtenberg, Knut]

Bob & Joerg,

the official documentation of the Mega32 CPU (doc2503.pdf) - the one I'm
using - says "When using the SEI instruction to enable interrupts, the
instruction following SEI will be execued before any pending interrupts
..."

You sould have a look in detail "AVR CPU Core" and within this chapter
see the paragraph "Reset and Interrupt Handling".
It also says: "The interrupt execution response for all the enabled AVR
interrupts is four clock cycles minimum.... "

Hope this document is public enough ;-).

Knut


> Message: 5
> Date: Tue, 15 May 2007 15:49:12 -0400
> From: "Bob Paddock" <address@hidden>
> Subject: Re: [avr-libc-dev] FAQ #27: "Why are interrupts re-enabled in
>       the     middle of writing the stack pointer?"
> To: "Joerg Wunsch" <address@hidden>,
>       address@hidden
> Message-ID: <address@hidden>
> Content-Type: text/plain; format=flowed; delsp=yes;
>       charset=iso-8859-15
> 
> 
> >> Good to know, but would still like to see the behaviour officially
> >> documented by Atmel.
> >
> > If they broke it now, they would suddenly invalidate all 
> GCC-generated
> > code...  That doesn't sound like a good marketing trick. ;-)
> 
> I don't want them to change it, I just
> want them to write it down in a public
> document.

----------------------------------------------------------------------
This mail is made from 100% recycled electrons.