|Subject:||Re: [avr-gcc-list] Learning about using SPI|
|Date:||Sun, 25 Feb 2007 11:07:53 +0100|
|User-agent:||Mozilla Thunderbird 1.0.7 (Windows/20050923)|
Joerg Wunsch wrote:
Juergen Harms <address@hidden> wrote:I am presently exploring the (excellent) documentation and trying to build up knowledge. I did not find much about SPI (except what figures in the CPU documentation).You don't need much more than that. Running an SPI master is really that simple, running an SPI slave with a microcontroller is virtually impossible. SPI has not been designed as an inter-processor bus, it is nothing more but a serial shift register. So as a slave, you have to be really fast: once your master pulled your chip select signal, it is usually about to start up the first transfer. Typically, the master's first transfer is then something like a command byte, and the slave's response has to be computed based on that command. Poor slave then has to fetch the data to be returned, and put the first byte into its SPDR *before* the master has a chance to start the next clock cycle. The slave has no means to say: ``Hold on, I'm not yet finished.'' (The typical SPI application uses hardware slaves, and they typically calculate and setup the slave's response within much less than a microsecond.) So if you want inter-processor communication, use something else. E.g. in I²C, the slave is explicitly allowed to delay the start of the actual first data transmission until it's got its part ready to go. The only pitfall with the SPI master is that you should take care for your own /SS pin. Everything is fine if that pin is configured for an output, as it's got no meaning to the SPI hardware then. However, if the pin is configured as an input (which would be its default configuration if not changed), it will become a master/slave selection switch for a multi-master configuration. Thus, typically the SPI master uses that pin as its own output signal to select the (first, if many) SPI slave.
I disagree with Joerg ( first time i think)
I implemented a system with 5 slave micros. ( witch are also programmed by SPI ). It took a while before i solved the problems Joerg meant: The master asks a byte: the slave must have this byte ready. I use the following trick: Every transmission starts with a fixed dummy byte. The slave has this byte already in the SPDR. On interrupt the slave puts the next byte of the response message in a buffer which is placed next time in the SPDR. This must happen fast: you have half the bit time to do this.
If someone is interested i can supply the source. I use a kind of protocol : the size of mastermssg and response of the slave mssg can be different, also i added a CRC.
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